Electronic Echo

General description, timing diagram, and circuit diagram

1. to convert the analog microphone signal into a sequence of digital samples,
2. to store the samples into a cyclically organised memory,
3. to read them out after one cycle (the delay corresponds to the cycle length and the sampling rate),
4. to convert the samples back to an analog signal,
5. to amplify the signal and feed it to a speaker.

• just the cheapest microphone capsule available (EM4B)
• the TL072 dual opamp for the microphone pre-amplifier (which simultaneously works as the anti-aliasing filter (3dB-frequency: 5kHz)) and for the reconstruction filter (also 3dB-frequency:5kHz);
• the analog-digital converter ADC0804; This converter is rather slow, the converting time is 100μs. The data sheet says that one can turn up the internal clock frequency at the cost of converting precision. By doing so we got a sampling frequency of about 20kHz. That makes an oversampling of 5kHz with respect to the cut-off frequency of the anti-aliasing filter.
• the static 32kByte-RAM HY65825;
• the 16bit-counter composed of four 4bit-counters 74HC393;
• the D-Flipflop 74HC374 as an output buffer
• and the digital-to-analog converter ZN426 that cannot be bought at Conrad-Electronics. Thomas Falk had just had such a beetle left in his hobby box.

  When rebuilding the Echo you can use a TL7524 as a replacement for both, the output buffer 74HC374 and the DAC ZN426. Just ground the /CE-input of the TL7524 and connect the /WR-input of the TL7524 to the DFF,Clk signal in the original circuit.

• The TL820 as a standard 1W-audio frequency amplifier to drive the little speaker. (Use whatever you like instead.)

The circuit diagram is split into an analog part and a digital part. Click on the following thumbnails to get the corresponding circuit diagrams in DIN A4 postscript format.

Digital part.	Analog part.

Note, that this is my first use of Eagle-light. So, please excuse graphical imperfections in the circuit diagrams.

The next figure shows the timing diagram.

For the description of the timing diagram, we assume that the sampling frequency of the ADC is 10kHz. As mentioned above, this frequency can be up-scaled as much as the decreasing conversation quality of the DAC admits.

With the help of two D-Flipflops two 20kHz clock-signals Clk and ClkD are derived from some 40kHz-square signal. Thereby, ClkD is a 90°-delayed version of Clk.

The counter is driven by the Clk signal. The bits CT1 to CT15 of the counter are used for the address bus of the memory. That means that the memory address is incremented with a frequency of 10kHz -- half the frequency of Clk.

1. In the phase Ct0=low the memory at the current address is read and the corresponding value is feed to the output buffer (low-high-transition of the signal DFF,Clk ). At the same time the ADC is initialized (high-low transition of /ADC,WR) and the conversion cycle of the ADC is started (low-high transition of /ADC,WR).
2. In the phase Ct0=high the ADC is read (low phase of /ADC,RD) and with the low-high transition of the memory chip enable signal (/M,CE) the output of the ADC is written into the RAM at the current address.

   In my first design of the timing diagram I planned some delay between the low-high transition of /M,CE and the low-high transition of /ADC,RD. That complicated the circuit diagram. Frank Dachselt checked the timing diagram for me. He suggested to use the same low-high transition for /ADC,RD and /M,CE. That works since the memory is very fast and from /M,CE to /ADC,RD there is some logic that introduces some gate delay. That simplified the design quite a bit. Thank you, Frank!

3. At the next high-low transition of Ct0 the address is incremented and the whole game starts again.

Active Butherworth filters of third order are used as anti-aliasing filter and as reconstruction filter (steep filters are needed because of the relatively low oversampling).

The active anti-aliasing filter also works as the microphone pre-amplifier. The pre-amplification level can be adjusted by the potentiometer R3.

Thomas Falk helped me with testing of the circuit in a lab at the electronical department of TU-Dresden. Since I left my magnification glasses at home I could not see the solder pads. So, he also made some necessary changes for me. Thank you, Thomas!

A picture